1. Field
Exemplary embodiments of the present disclosure relate to a neuromorphic device and a method of adjusting a resistance change ratio thereof, and more particularly, to a neuromorphic device that includes a synapse having a transistor and a memristor, and a method of adjusting a resistance change ratio of the synapse in the neuromorphic device using a gating pulse.
2. Description of the Related Art
Recently, much attention has been paid to neuromorphic technology using chips that mimic the human brain. A neuromorphic device used in the neuromorphic technology includes a plurality of pre-synaptic neurons, a plurality of post-synaptic neurons, and a plurality of synapses. The neuromorphic device outputs pulses or spikes depending on various levels, amplitude, or times, according to learning states of the neuromorphic device. A learning level of a synapse in the neuromorphic device may be set by changing a resistance value of the synapse to various levels.
In order to change the resistance value of a synapse, Spike Timing-Dependent Plasticity (STDP) has been proposed. STDP refers to a method of changing a resistance value of a synapse according to an integrated value of an overlap time between a pre-synaptic pulse and a post-synaptic pulse. However, it is difficult to finely control the overlap time between the pre-synaptic pulse and the post-synaptic pulse. Thus, it is also difficult to lower a resistance change ratio of the synapse, and to improve the learning and recognition ability of a neuromorphic device including the synapse.